1. Field of the Invention
The present invention relates to a display device. Particularly, the invention relates to a display device that improves a display quality by suppressing a variation in parasitic capacitance of a transistor provided in each of plural pixel circuits.
2. Description of the Related Art
In a display device having plural pixel circuits arranged on a display panel, a gate electrode of a transistor as a switching element provided in each pixel circuit is connected to a scanning signal line, and an input side of the transistor is connected to a data signal line. A high voltage is selectively applied to the gate electrode of the transistor via the scanning signal line. A display control voltage in accordance with display data of the pixel circuit is supplied to the pixel circuit from the data signal line during a time when the high voltage is applied to the gate electrode of the transistor, so that an image display on the display panel is controlled.
In general, the plural pixel circuits are arranged in a matrix pattern on a display area of the display panel, one scanning signal line is disposed to be stretched in the transverse direction along with the plural pixel circuits arranged in one row in the transverse direction, and one data signal line is disposed to be stretched in the longitudinal direction along with the plural pixel circuits arranged in one column in the longitudinal direction. However, for example, various structures may be supposed on the ground that a space of a frame area of the display panel is restricted.
For example, when an upper or lower space in the longitudinal direction is restricted in the frame area of the display panel, two scanning signal lines are respectively disposed to be stretched in the transverse direction along with the upper and lower sides of the plural pixel circuits arranged in one row in the transverse direction, and the two scanning signal lines are respectively and alternately connected to the plural pixel circuits arranged in the one row. Then, one data signal line is disposed to be stretched in the longitudinal direction for every two pixel circuits in the plural pixel circuits arranged in the one row, and is connected to two pixel circuits located on both sides of the data signal line.
In this case, the number of the scanning signal lines is twice the number of the scanning signal lines provided in the general display device, but the number of the data signal lines is a half of the number of the data signal lines provided in the general display device. Further, JP 6027488A discloses a technology related to the display device in which the scanning signal line and the data signal line are disposed with respect to the plural pixel circuits as described above.